The present invention relates to a method and apparatus for reducing power consumption of a microprocessor based device which is designed to operate from a stored energy source so as to extend the useful life of the stored energy source and therefore the ability to use the microprocessor based device. More particularly, the invention relates to a method and apparatus which reduces the power usage of the microprocessor itself during periods of inactivity or where the full extent of the microprocessor""s capabilities are not necessary for the tasks being performed on the device. The reduction in power usage of the microprocessor is accomplished automatically based upon determinations of such inactivity or other predetermined conditions.
There are a growing number of portable microprocessor-based devices such as laptop computers, which are designed to run on batteries far from utility lines. In these systems, power consumption has been a primary factor limiting system design. Without adequate battery life, normal processing tasks cannot be completed in the operating time available. Consequently, most aspects of the design of portable microprocessor-based devices have been optimized to conserve battery power. The power required by display systems, disk memory, and support circuitry have all been reduced. The known methods used to conserve power are two: first, to develop components that consume less power, and second, to interrupt or suspend component operation during period""s of inactivity. These two methods are effective for all components except the microprocessor itself.
Power savings have been achieved in display systems by the above two strategies. The technologies used for screen displays have shifted from those consuming large power such as cathode ray tube, light emitting diode, and gas-plasma displays, to those with more modest power requirements, principally liquid crystal displays with or without backlighting. In addition, circuitry has been introduced to microprocessor-based devices to automatically shut off the screen, thereby conserving the power that it would use during lengthy periods of system inactivity.
Inactivity is typically determined by the absence of change in the data displayed on the screen or typed at the keyboard of a microprocessor-based device. The power consumed by disk drives has been reduced by using newer designs that are smaller and more energy efficient. In addition, hard disk drives, which normally consume power continuously because their magnetic media must be kept constantly spinning, have been devised which automatically stop their rotation after a predetermined period of microprocessor-based device inactivity. Inactivity is determined by the absence of commands to store data on or retrieve data from the storage medium.
Although these steps have helped to extend the usefulness of portable microprocessor-based devices, there has also been a trend to put increasingly powerful microprocessors into the machines. This exacerbates the battery power drain because more powerful microprocessor-based devices are more complicated, have more internal circuitry, and naturally consume more energy. For example, the Intel 80386 microprocessor comprises about 375,000 separate internal transistors; the newer 80486 comprises over a million, and even newer devices in the future will necessarily be comprised of even larger numbers.
Microprocessor power reduction has been achieved in some portable microprocessor-based devices such as those based on the 8088 and 80286 made by Intel Corporation by using special designs based on low-power Complementary Metal Oxide (CMOS) semiconductor technology, which is an inherently more power-efficient technology than other common semiconductor technologies. As a result, the power required by the microprocessor in such devices is not as large a fraction of the total power required by the entire microprocessor-based system.
However, the more powerful the microprocessor, the greater the fraction of system power resources must be devoted to its operation. The 80386 microprocessor, for instance, can consume five to eight watts, which is more than the total consumption of all the circuitry and components in a less powerful microprocessor-based device combined. Yet more powerful portable microprocessor-based devices, such as those based on the Intel 80386 and other advanced designs already use CMOS internal circuitry. The effects of utilizing more powerful microprocessors such as the Intel 80386 can be seen in one known portable lap-top computer utilizing the 80386 microprocessor which will have a typical operatic time of xc2xd hour before the battery life of the device is exhausted. This assumes that the computer is being used, At least to some degree, for computing tasks which will consume more power than the simple house keeping functions of the microprocessor. In the known laptop computer, the microprocessor is operated at a relatively slow speed of 12.5 MHz., to try and extend the useful life of the device, but also results in non-efficient operation of the device.
Moreover, the other traditional power saving techniques cannot be applied to the microprocessor. The microprocessor cannot be stopped during periods of inactivity. When the microprocessor stops its operation, the microprocessor-based device itself stops operating and is unable to detect when to resume operation when activity is resumed. Also as mentioned before, the microprocessor is never completely inactive. In all practical microprocessor-based devices, the microprocessor constantly engages in housekeeping functions. It continuously executes instructions to monitor the data-input devices, such as sensors or keyboards, as well as its input and output ports for new data input.
This monitoring process typically involves repeatedly executing a looping string of instructions. Stopping the operation of the microprocessor would halt the execution of those instructions necessary for monitoring the system, depriving the microprocessor of the ability to restart itself. Consequently, all current portable microprocessor-based devices must necessarily keep the microprocessor operating at all times.
It is also recognized that the power consumed by a microprocessor is directly related to the frequency of the oscillator driving it. During normal operation, the circuitry inside a microprocessor is constantly active: transistors continuously change state to execute logic operations as governed by the oscillator. Each change of state necessarily consumes a fixed and predetermined amount of power. The more often state changes take place; the more power is consumed by the microprocessor. On the other hand, reducing the oscillator speed also degrades the data processing ability of the microprocessor, contrary to the primary design goal in using a more powerful microprocessor which is to improve performance through higher operations speeds. Thus, unfortunately, the consequence of greater microprocessor speed, and better, more desirable performance characteristics, is greater power consumption.
There are also known in the prior art computers and other devices which are capable of multi-speed operation such is found with a xe2x80x9cturboxe2x80x9d function associated with some personal computers. These devices essentially operate at a normal operating speed under most circumstances but may be changed to operate at a higher speed for compatibility with software which is speed critical. In order to change the operating speed in these devices, a switch or instruction given by the user through the keyboard or other input device will manually convert the speed of operation dependent upon the user requirements. In such a system, the multi-speed operation does not reflect upon power usage of the device as such devices are not designed to be portable and run from a battery or other stored energy source.
Based upon the foregoing, it is a main object of the invention is to reduce the power consumption of microprocessor. Based devices through the application of a specific process and apparatus to perform said process which reduces the frequency of the oscillator driving the microprocessor automatically during the periods in which it is performing non-critical operations. That is, microprocessor speed reduction during periods in which all of the-data processing ability of the microprocessor-based device is not demanded.
It is another object of the invention to provide a method of reducing the power consumption of a microprocessor-based device wherein the microprocessor itself is utilized to determine periods of inactivity or other predetermined conditions to reduce the microprocessors operating speed accordingly.
It is yet another object of the invention to provide the process and apparatus to reduce the power consumption of a microprocessor-based device by utilization of an external circuit which-may be incorporated into the device to determine periods of inactivity or other predetermined conditions to reduce the operating speed automatically.
A further object of the invention is to provide a method and apparatus to reduce the power consumption of a microprocessor-based device which utilizes the occurrence of critical instructions or non-critical instructions or the reoccurrence of non-critical instructions to determine periods of activity or inactivity respectively, from which the operating speed of the device may be automatically changed accordingly.
These and other Objects are realized using the apparatus of the present invention which may be comprised of three parts in addition to the typical circuitry of a microprocessor-based device: a monitoring module, an oscillator latch, and a source of multiple oscillator frequencies.
The monitoring module may be implemented either as a defined process running on an unmodified microprocessor such as the Intel 80386 (or any improved future microprocessor design), as a hardware circuit connected to the data lines of this or any other microprocessor, or as a hardware code internalized inside the microprocessor.
The monitoring module may serve the functions of determining periods of non-critical use and the onset of critical use of the microprocessor. Periods of non-critical use are determined by the lapse of a predetermined time period without the occurrence of a critical defined command (specific interrupts or other predetermined instructions) or the repetition of a pattern of non-critical instructions for a given number of iterations (for example, instructions for polling a keyboard, parity-checking a spreadsheet, or polling sensor devices). The onset of critical use is determined by the occurrence of certain defined interrupts or instructions in the sequence read by the microprocessor.
The monitoring module controls a bi-state logic latch, the second part of the apparatus which selects between two sources for the oscillator frequency to be delivered to the microprocessor. When the latch receives an indication of critical use from the monitoring module, it selects the higher oscillator frequency. Alternatively, when it receives an indication of non-critical use, it selects the lower oscillator frequency.
In its most elementary form, the source of multiple oscillator frequencies is a standard oscillator circuit coupled to a simple frequency divider. Such a design assures that the two oscillator frequencies are constantly synchronized. More design freedom is afforded by using two separate, independently-operating oscillators, which need not be related in frequency. In this case, however, the oscillator latch must incorporate additional logic to match oscillator cycles to maintain an acceptable duty cycle during the switching period.